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DSP Source Code Interface Software
DSP Source Code Interface software provides access to DSP source code for several supported
DSP devices, including math and DSP routines, analog I/O drivers, and real-time processing
structures used by the Hypersignal software packages. These packages
can be used to customize Hypersignal-Macro and Hypersignal-Acoustic operation, or
operation of some DirectDSP® high-level operations when a
Hypersignal package is used as the DSP Engine. Interface for user-defined C routines to be
used in real-time processing algorithms and products is available; debug mode with
simultaneous disk waveform file record is included.
DSP Source Code Interface software packages include math and DSP library routines,
device drivers for analog resources on supported boards, and real-time, interrrupt-driven
structures which allow foreground and background processing in conjunction with analog I/O
sample interrupts. Without modification, each DSP Source Code Interface forms the basis
for standard Hypersignal-Macro, DirectDSP, and Real-Time Composer™ software operation, including
instrumentation displays, continuous transfer to/from disk, and file-based acceleration.
In other words, if you were to assemble and link the standard DSP source code for each
supported DSP chip, without any changes, you would end up with the executable files sent
with real-time software packages. Howerver, should you then modify, add, or otherwise
customize the source code, you are creating new executable files that customize your
system's operation.
Changes can be simple, such as interfacing to new analog converters or accessing other
resources on the board, or extensive, such as simulating and testing complete algorithms
or products. Because the mechanism for transferring data continuously and in real-time
between high level host software functions and the DSP is transparent, you are free to
concentrate on the DSP problem at hand. By simply placing the data you need to see or
montior in the correct buffer, at such time or intervals as it becomes ready, you can
complete control the content and operation of high level host software instrumentation and
disk transfer function. Although not necessary, maintaining the host software
infrastructure for transferring data and communicating control parameters offers many
advantages throughout the course of your product development. Examples include comparing
input data and algorithm output data in real-time, leaving "field-test"
capability embedded in your product, and evaluation real-time limits.
For each chip, the Hypersignal®-Macro,
DirectDSP®, and DirectDSP software downloaders
accept direct linker output from the DSP chip vendor's development tools (e.g C compiler/
linker/asm.). The process of making source code changes and sending those changes into
real-time action is essentially:
1) make source code changes using editor
2) compile and/or assemble
3) link (creating new executalbe file)
4) run host software application 5) repeat
This process is fully docemtned for each DSP Source Code Interface, located in the
Signalogic DSP Software User's Guide. All source code files are well-commented and clearly
document variables, structures, and procedures related to the intrinsic host software high
level interface. Below is a partial list of typical source code and utility files included
with each DSP Source Code Interface:
DSP Source Code Interface Features
Source code and real-time programming interface to DSP/data acq. hardware with device
types:
*Analog Devices ADSP-21xx and ADSP-2106x *Lucent (formerly AT&T Microelectronics) DSP32C *Motorola DSP5600x, DSP563xx, and DSP9600x *NEC 77220 Texas Instruments *TMS320C2x, 'C3x, 'C4x, 'C54xx, and 'C6xxx
*Considered legacy DSP devices, not recommended for new designs.
Analog I/O drivers DSP and math routines Real-time and interrupt processing structures Real-time C programming framework, including hooks for
adding user-defined real-time C code, in order to customize products and algorithms
Function Summary
xxxDEF:
|
variable and constant definition (xxx refers to DSP chip) |
xxxBEG:
|
DSP chip initialization code, analog I/O and converter initialization code, ISR vector initialization, variable initialization, and initialization of high level interface (xxx refers to DSP chip) |
xxxLINK:
|
linker specification and map control file (xxx refers to DSP chip) |
ASM: |
batch file to assemble typical assembly language source code files |
LNK: |
batch file to link typical configuration |
ISRn:
|
various ISRs (interrupt service routines) for different analog I/O function; each ISR contains different entry points for specific DSP/Acquisition hardware that isolate hardware-dependent analog I/O code and which converge into common, highly optimized code |
ARCTAN:
|
2-quadrant arctangent approximation |
CONVLV:
|
convolution/correlation |
DIVIDE:
|
fractional and integer divide for fixed-point DSPs; floating-point divide for floating-points DSPs |
EXP2:
|
base 2 exponentiation |
FFT: |
complex input, decimation-in-time FFT/inverse FFT |
FIR: |
FIR filter implementation |
IIP2:
|
IIR filter implementation (modified direct form using 2nd-order, or "biquad cascade" sections) |
IIR3:
|
IIR filter implementation (balanced pole-zero form using 2nd-ordr, or "biquad cascade" sections) |
LOG2:
|
base 2 log approximation |
MAG: |
complex input magnitude |
MAX: |
location of maximum value in buffer |
MIN: |
location of minimum value in buffer |
PHASE:
|
complex input 4-quadrant phase approximation |
SQRT:
|
squareroot approximation |
WINDOW:
|
time domain window application and zero_filling |
XFER:
|
complex-ratio transfer function calculation |
Minimum System Requirements for Signalogic DSP Software
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