Host Port
Memory (onchip SRAM, offchip program SRAM, offchip data SRAM, onchip
ROM, offchip EEPROM); multiple tests including boundary conditions,
stuck bit, walking bit, code execution from offchip program SRAM,
wait-state variation, etc.
TDM/Serial Port (internal loopback, external loopback, external chain test)
DMA Channels (only on supported C54xx device types; includes a variety of
sources/destinations supported by the hardware configuration)
Timers
Onchip PLL (independently measured and verified using host PC system
clock, using different PLL multiplier and divider settings)
Interrupts (internal, software TRAP, and external)
Programming and verification of tracking ("cookie") data on-module
EEPROM (if applicable)
CPU (cache, status and other registers, accumulators, shift
registers, address modes, stack options, single-instruction loop,
block loop, etc.)
Intercore communication (only on supported C542x and C544x device types)
Stress and Load Tests (combination testing)
Report generation, report file logging, default "Test All" settings,
debug mode and production mode settings
Database record storage, management, and report generation; each module
is added to MS Access database after test, including module tracking
information and all test parameters and results
Diagnostic mode allows specific control over test parameters and
module, processor, and memory configuration, infinite test repeat,
selectable individual tests and processor list, more
user-selectable options
Fully compatible with
DirectDSP® software for system development, system expansion, and
DSP algorithm development purposes
