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MELPe - SigC5xxx MELP and MELPe Voice Compression System



Click here for full-size picture
Frequency domain (2-D spectrograph) and time domain
(waveform display/edit) graphs of pre-MELP speech data
(trace 1) and MELP-processed speech data (trace 2).
Click here to listen to the raw waveform sample and
MELP-processed waveform sample
Click here for full-size picture
Same data as above, with waveform zoom. Click here to
listen to the raw waveform sample and
MELP-processed waveform sample

Overview

Signalogic has developed bit-exact, real-time MELP and MELPe (Mixed Excitation Linear Predictive) implementations for Texas Instruments C5xxx DSP processors, based on new government voice compression communication standards for 1.2 and 2.4 kbps (150 and 300 bytes per sec) compressed speech, including US Govt. MIL-STD 3005 and NATO STANAG 4591. MELP is much-improved algorithm that supersedes the previous "LPC10" Vocoder standard. In this process, legacy MELP source code has been reorganized, redundancies removed to take advantage of high C5xxx processing rates, and real-time processing errors corrected. Also, the source has been reformatted to provide multichannel real-time operation, including analog I/O (voice) and digital I/O interrupt-tolerant execution and resolution of C5xxx pipeline issues.

Texas Instruments supported DSP devices include C5409A, C5416, and C5421. A C5509A version is under development.

The extremely low bit rates of 1200 and 2400 bps (150 and 300 bytes per sec) make the MELPe speech compression algorithm suitable for a wide range of telecom applications, including VoIP (Voice-over-Internet Protocol).

Signalogic has demonstrated real-time MELPe on SigC54xx SODIMM multiprocessor modules, which are small form-factor multi-DSP modules used by a wide range of  speech acoustic, VoIP, and telecom clients. Supporting modules include the SigSD4 Audio Module, also in SODIMM form-factor, which provides 4-channel 16-bit sigma-delta analog I/O.

The SigC5xxx MELP System is fully supported by the SigC5xxx Development System, and DirectDSP software, which provides direct access, analysis, monitoring, and real-time debug capabilities from C/C++ (MSVC and Borland), MATLAB, Visual Basic, and LabVIEW host environments.

Production MELP and MELPe systems have been implemented based on the SigC54/55xx-PC/104 board, which provides small form-factor, high-density multichannel MELP performance, suitable for stand-alone operation in rugged environments.

MELPe Real-Time Implementation

Signalogic has completed the process of adding MELPe algorithm code, which adds a 1200 bps option, harmonic synthesis model, noise pre-processor (NPP), synthesis post-filter, VAD, and other features to the base MELP algorithms. The MELPe algorithm is also a real-time C5xxx implementation.

MELPe Plus

Signalogic is engaged in an on-going research effort for real-time very-low-bitrate codecs, collectively called MELPe-Plus. Additional research enhancements include 600 bps operation, variable framesize (16 msec to 30 msec), alternative mid-range bitrates from 2000 to 4800 bps, improved noise reduction algorithms, and improved speech quality. The effort includes new research areas as well as improvements to the base MELPe algorithm. For example, several pitch and gain algorithm errors have been identified and corrected, and improved pitch detection algorithms are being tested. One objective has been to enable 2400 bps MELPe to handle the "music on hold" test, which would help make it suitable for telephony applications.

Feature Summary

The SigC5xxx MELP System is a low-cost, scalable, modular signal processing approach to voice compression based on fixed-point off-the-shelf Texas Instruments C5xxx DSP devices. Features of the SigC5xxx MELP System include:

  • Multichannel real-time performance. With one (1) SigC5409A or SigC5416 processor module installed, the SigC5xxx MELPe System is capable of processing and MELP-encoding up to six (6) half-duplex, and three (3) full-duplex channels at 8 kHz sampling rate (16-bit data). Channel capacity is twice that if the older MELP algorithm is used.
  • The MELP/MELPe development system can accept up to two (2) SigC5xxx modules and one 4-channel audio module; the production system either two (2) SigC54xx modules and two (2) audio modules, or three (3) SigC5xxx module and one (1) audio module. Maximum capability of the production system assuming all digital I/O would be 24 full-duplex channels and 48 half-duplex.

  • Scalability. The SigC5xxx MELP System provides scalable MELP performance and channel capacity by taking advantage of small, multiprocessor 72-pin SODIMM modules to provide flexible configuration of number of processors, type and performance of processor, and amount of dedicated SRAM per processor. This approach makes different customer configurations and product and field upgrades straightforward.
  • Flexible audio interface. A low-cost, simple, SigSD4 Audio Module, based on software-programmable, off-the-shelf Cirrus Logic CS4218 16-bit sigma-delta codec devices, is available which provides serial bitstream interface directly to C5xxx DSP devices, and which provides sampling rate and audio level matching under software control.
  • MELP Development System, including multi-module test and development platform with high-speed PC interface, supported by commercial off-the-shelf (COTS) development software tools. The SigC5xxx MELP System is fully supported by Signalogic and Texas Instruments COTS development software tools for Win9x and WinXP platforms, including DirectDSP software, DirectDSP software, Hypersignal-Macro software, and Code Composer JTAG debugger. Host software support includes interface libraries and host API for C/C++ and MATLAB, and C5xxx DSP API including analog I/O initialization and functions.

  • Small form-factor for MELP production systems. The SigC5xxx-PC/104 board is implemented in PC/104 form-factor, which allows OEM manufacturers to embed multichannel MELP capability in a volume approximately 3.5" x 3.75" x 1.0"

MELP / MELPe Development System

The MELP / MELPe Development System offers real-time MELP voice compression performance in a PC-based, desktop form-factor suitable for proof-of-concept and application-specific development requirements.

The MELP /MELPe Development System is based on theSigC5xxx Development System; the default configuration is four channels of real-time MELP processing. The system can provide vocoded audio output or digital serial output suitable for conversion to RS-232 or RS-423 format for test and measurement purposes.

The default-configuration MELP / MELPe Development System:

  • contains two COTS SigC5xxx-SODIMM modules, in 72-pin SODIMM format, each with three 100 - 160 MHz C5409A or C5416 processors. On these modules, each processor has its own dedicated 128k x 16 SRAM, organized as 32k x 16 Data SRAM and 96k x 16 Program SRAM
  • contains one 4-channel, 16-bit sigma-delta analog I/O SigSD4 Audio Module, also in 72-pin SODIMM format. Two of Cirrus Logic CS4218 audio codec devices are used on the Audio Module; each codec is 2-channel and contains both A/D and D/a converters. The sigma-delta converters provide software-programmable sampling rates from 4 kHz to 48 kHz (signal bandwidth from 2 kHz to 24 kHz), built-in anti-alias and reconstruction filters, highly linear phase response, and software-programmable input gain from 0 to +22.5 dB and output attenuation control from 0 to -22.5 dB. (Note: the required bandwidth to be supported by real-time MELP processing is 4 kHz).
  • is connected to Win9x host PC using high-speed host-interface card
  • is initialized, configured, and controlled by DirectDSP software, with direct interface from C/C++ (MSVC and Borland), MATLAB, Visual Basic, and LabVIEW

VDS Software

In addition to general development features and popular host environment support (MATLAB, C/C++, etc.) provided by the SigC54xx Development System, the MELP Development System includes VDS software which provides common voice compression development functions, including:

  • Synchronous serial and other channel transmission options, including sync format, coecficient packing, band rate and protocol settings, etc.
  • input/output to TIM, WAV, or ASCII text waveform files
  • raw and processed data display, both in time domain and in frequency domain, including 3-D spectrogram and 2-D spectrograph
  • packet inpairment testing and analysis, including BER and FER
  • real-time measurement capability (e.g. frames per sec), voice quality measurement
  • mode control; e.g. file-based simulation, real-time audio
  • input, etc.
  • real-time control over voice compression DSP code (including analysis mode, synthesis mode, bit rates, noise processing options, filtering options, transcoding, VAD, and other options)
  • input/output to synchronous serial port card in the PC

SigC5xxx-PC/104 Board "MELP / MELPe Production System"

The MELP / MELPe Production System is composed of a multi-module site board in PC/104 form-factor. This board, called the SigC5xxx-PC/104, contains four SODIMM module sites, host PC interface, digital I/O (RS-232 and RS-423) interface and connectors, JTAG debug headers, standard PC/104 bus connectors, and 100-pin "Global Bus" connector for peripheral expansion.

The SigC5xxx-PC/104 board can accept SigC5xxx-SODIMM multiprocessor modules, and SigSD4-SODIMM Audio Modules. A standard SigC549-SODIMM module contains three 100 MHz C549 processors and three sets of 128k x 16 SRAM devices. A standard SigSD4-SODIMM module contains two 16-bit, 2-channel sigma-delta codec analog I/O devices and interface circuitry. Audio Modules provide a multiplexed, 128-bit frame, 4-channel serial bitstream suitable for digital I/O interface to SigC5xxx processor modules.

Features of the SigC5xxx-PC/104 board include:

  • fully conforms to PC/104 board footprint, height, and stacking requirements
  • contains four 72-pin SODIMM sockets, mounted flat (horizontally) on the PC/104 board, two on each side. The approximate area consumed by the SODIMM sockets is 2.5" x 2.75", well within the 3.5" x 3.75" PC/104 board space, and leaves ample room for peripheral circuitry and connectors. The horizontal, flat sockets are surface mount and provide three side PCB containment and spring-loaded metal side brackets which snap into PCB guide holes, offering improved reliability and shock / vibration resistance over vertical or angled SIMM or other mezzanine. See Figure 1 below, SODIMM Module and Socket Example.

  • Figure 1 SODIMM Module and Socket Example
  • can accept up to four SigC5xxx-SODIMM modules, each containing up to three 100 MHz C549 or C5420 DSP processors, and up to three sets of 128k x 16 dedicated local SRAM per processor, organized as 32k x 16 data SRAM, and 96k x 16 program SRAM. A maximum of four modules provides a total of 1200 MIPS; using future pin-compatible modules with dual-core C5420 devices will increase total MIPS to 2400 or more.
  • contains a 100-pin, 32-bit "Global Bus" digital I/O connector, compatible with other SigXXX PC/104 expansion boards (see, for example, the SigC44-PC/104 board)
  • contains multiprocessor host-port interface circuitry compatible with DirectDSP, Real-Time Composer™, and Hypersignal software development tools, which provide standard, off-the-shelf software development tool support during development phases of any project involving SigC5xxx-PC/104 boards, as well as field test, measurement, and data gathering capabilities.
  • contains boot EEPROM site and processor boot-option jumper header, to allow host-independent, stand-alone operation
  • contains RS-423 drivers and serial format conversion circuitry, in order to convert C5xxx processor synchronous serial data output (for example containing vocoded audio), to asynchronous serial data format
  • can be specified to use industrial grade (-40 °C to 85 °C components) where possible
  • contains standard JTAG 1149.1 header for debugging purposes

SigC5xxx-PC/104 boards are redundant in that if any one processor fails, other processor continue to operate, and if any one module fails, other modules continue to operate. For example, in a system with three modules with three processors each, a system normally operating at 18-channel half-duplex could degrade to two modules and continue operating at 12-channel half-duplex.

The SigC5xxx-PC/104 board contains built-in expansion capability, not only using SODIMM module configuration, but by allowing additional SigC5xxx-PC/104 boards to be stacked using the standard PC/104 connectors. Additional boards can communicate with each other using the GlobalBus connector, which is also stackable.

Software Support and Debug

Both the MELP / MELPe Development System and the MELP / MELPe Production System, based on the SigC5xxx-PC/104 board, are fully supported by the DirectDSP,  and Hypersignal-Macro software development tools.

Both the MELP / MELPe Development System platform and SigC5xxx-PC/104 board contain multiprocessor host-port circuitry which provides compatibility with drivers used by Hypersignal, DirectDSP, and Real-Time Composer™ software. This gives both systems the ability to access and monitor data, variables, buffers, etc. in the MELP code while it is either stopped or running, directly from C/C++, Visual Basic, MATLAB, and LabVIEW environments. Also provided are full board control, analog I/O initialization and control, program code download, and other hardware-related capabilities. The DirectDSP software includes complete source code and project file examples.

In addition, the SigC5xxx-PC/104 board has the capability to operate either stand-alone or outside of a standard Win9x host PC environment, due to its onboard boot EEPROM.

The DSPower Visual Environment software offers a visual signal flow diagram environment for generating and debugging application-specific C5xxx code, and for testing the integration of MELP / MELPe real-time C5xxx DSP code.

Both the SigC5xxx Development System and the SigC5xxx-PC/104 boards contain standard JTAG debug headers compatible with Texas Instruments' Code Composer debugger and software tools.