VDS™ (Voice-over-Packet Development System)
- Overview
- Features Summary
- Applications
- System Configuration
- VoP Options
- DSP Hardware Configuration
- Host Interface
- Specifications, Data Sheets and Diagrams
- Interactive Demo
Overview
VDS™, or Voice-over-packet Development System, is targeted at development and test of VoIP and VoATM systems and products. VDS is an integrated environment that provides simulation analysis, debug, test, and measurement functionality. The VDS environment implements and monitors packetized voice and audio communication over IP and ATM networks, including LAN, Internet, synchronous serial, and other media.
VDS combines both simulation and real-time operating modes. It includes support for several types of off-the-shelf DSP hardware, including SigC54xx cards and systems, Signalogic multiprocessor telecom modules, and Texas Instruments® DSK boards.
VDS test and measurement features include both packet analysis and packet impairment. Packets may deliberately be impaired with a variety of error types in order to debug and measure performance system components such as jitter buffer and echo canceller. The VDS environment and architecture supports operation as a fully automated test system.
Individual voice and audio processing components within VDS may be configured either as DSP software (DSP Mode, running on supported DSP hardware), or as host PC software components (Host Mode). Within the VDS user-interface, software components can be easily configured as DSP Mode or Host Mode in various combinations. This flexible and interactive configuration facilitates both development and analysis phases of VoIP and VoATM projects.
Loopback test and diagnostic mode
|
Features Summary
- Telogy® software-compliant; if Telogy software is running on the supported DSP hardware types, VDS provides a development and measurement interface to Telogy voice software parameters and data
- Support for specific C54xx DSP hardware, including:
- Supports plan
- Supports different network connections and configuration, including modem, DSL, and LAN
- Supported voice/data sources include TDM (e.g. H.110 subset), analog (e.g. multichannel 16-bit sigma-delta), and T1/E1
- Packet Analysis functions include analysis, measurement and test functions for received packets, visual display and graphical and statistical analysis.
- Packet Impairment may be used to generate artificial packet transmission errors, including delay, mis-ordering, FER, bit and burst error
- Highly configurable: each software component can be specified as available in either Host Mode or DSP Mode
- Supports DSP software development, including:
- DirectDSP® software provides direct access to DSP hardware from Microsoft Visual Studio™, MATLAB®, or LabVIEW®
- Texas Inst. Code Composer Studio™ software is supported through JTAG interface on DSP hardware
- C54xx Source Code Interface
- Real-Time Algorithm binary and source code options for DSPs
- Hypersignal®-Macro software
- Support for MATLAB® interface, using DirectDSP® software; MATLAB programs may either serve as voice/audio processing components or call components as DLLs
- Support for Visual Studio development tools: voice and audio software components on host side may be Visual C/C++ or Visual Basic DLLs or OCXs
- Includes network-side and telephony-side configuration and management
- Supports UDP/IP, RTP/RTCP and TCP/IP packet communication protocols
Applications
VDS is intended primarily for the development of VoIP and VoATM systems and products, and may also be used to:- Cost-effectively and accurately test and measure existing systems, including ability to perform as fully automated functional test system
- Develop real-time voice and audio DSP algorithms
- Test and debug DSP-based hardware for use in embedded VoIP and VoATM systems
- Assist and support integration of Telogy voice software into an existing system1
Peer-to-peer full duplex example
Example VoP options for transmit and receive side
Example DSP Hardware Configuration display
Example Network Configuration Display
|
System Configuration
System configuration options include half-duplex transfers for either encode or decode, or full duplex transfers for both encode and decode. Input and output data transfer sources can be file (simulation mode) or real-time sources such as a T1/E1, stream, multichannel sigma-delta analog/audio, or H.110 or subset. Packet interfaces may be synchronous serial, and various types of networks such as LAN, DSL, dial-up modem, etc.VoP Options
Voice-over-packet options include Transfer Mode, CODEC type, RTP Header type, Echo Canceller type, Packet Buffering, and Transfer Parameters.- Real-time Mode operation is supported by DSP hardware included in the system
- Simulation Mode operation using file data; supported file formats include .tim, .wav, .aif, and text
- RTP protocol header options include RTCP header (“lite header”)
- Transfer parameters include frame size (specified in bytes), frame or packet rate (msec)
- Echo cancellers, including G.168 compliant1 and others
- Codec type options include:
- ITU G.711 (A-Law and µ-Law)1
- G.721 (32 kbps)1
- G.723 (24, 40 kbps)1
- G.723.1 (5.3, 6.3 kbps)1
- G.726 (16, 24, 32, 40 kbps)1
- G.728 (16 kbps)1
- G.729 (Annex A and AB)1
- MELP
- Jitter Buffer options include packet re-ordering, missing packets actions comfort noise, silence, repetition of last packet
- An alternate Delay Buffer, a variable size circular array, is available as a simplified Jitter Buffer with no packet correction
- Buffer underrun error protection enable/disable
DSP Hardware Configuration
DSP hardware currently supported by the VDS includes:- Signalogic SigC54xx Development System, configured with one of the following module types:
- Signalogic SigC5561-7x7-PTMC VoIP Board (12 TNETV3010 DSPs, 2304 voice channels)
- Signalogic SigC54xx-PC/104 card (embedded system card with T1 interface, four-channel sigma-delta audio I/O, and RS-422/423 interface)
- Signalogic off-the-shelf and custom C54xx and C62xx multiprocessor DSP/telecom modules
- DSP processors do not have to be stopped to transfer data, as with JTAG
- DSP source code does not have to be “instrumented”, or otherwise modified with non-functional, non-relevant code sections, as with RTDX
Host Interface
The VDS uses an onboard PCI bridge chip to provide a standard host PCI Local Bus interface over PN1-PN2. In onboard POS-PHY mode, no custom or non-standard host microprocessor interface or carrier board modification is required. Host software support includes full device drivers, high-speed bulk data transfer, symbolic DSP code/data reference from high-level languages (C/C++, Visual Basic, MATLAB), example DSP source code, and default DSP functions and operating modes. Hardware support is complementary to JTAG and offers additional development and debug advantages, for example:- DSP processors do not have to be stopped to transfer data, as with JTAG
- DSP source code does not have to be "instrumented", or otherwise modified with non-functional, non-relevant code sections, as with RTDX