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SigC54/55/67xx Development System

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The SigC54/55/67xx Development System provides the basis for real-time, multichannel algorithm development for telecom applications. Examples include MELP and other speech compression, MPEG audio, echo cancellers, etc. The SigC54/55/67xx Development system can be used with Win9x host PC platforms,and with WinXP platforms depending on host driver availability.

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Feature Summary

The SigC54/55/67xx Development System is based on an external board which connects to the host PC via high-speed interface card and provides convenient access for multiprocessor/multimodule development purposes. The SigC54/55/67xx Development System allows direct access to multiple DSP devices on SigC54xx, SigC55xx, and SigC67xx SODIMM modules by routing command, control and data signals from a "high-speed host-interface card" (see diagram in Figure 2 below) to the host-port(s) on the DSP devices, via the configurable Xilinx FPGAs on the development board. SigC54/55/67xx Development System features include:

  • an advanced host-interface card (available in ISA and PCI versions) which provides direct, high-speed access to Texas Instruments C54xx, C55xx, C67xx, and C62xx "HPI" format host interfaces. One or a combination of DSPs can be controlled simultaneously, and accessed simultaneously on writes (broadcast mode), and individually on reads. Broadcast mode includes program (COFF) file download, reset, and run.

  • three SODIMM module sites, with three additional SIMM module sites being added in the next revision. A SODIMM socket diagram is shown in Figure 1 below:

    Figure 1 SODIMM Module and Socket Example

    SODIMM sockets are horizontal (flat) sockets which attach to the baseboard PCB using a 0.85 mm pitch surface mount connector and two vertices tabs. The approximate area consumed by a SODIMM socket is 2.5" x 2.75". SODIMM sockets provide three side module PCB containment and spring-loaded metal side brackets which snap into PCB guide holes, offering improved reliability and shock/vibration resistance over vertical or angled SIMM or other mezzanine style connectors.

  • JTAG header, with JTAG signals chained between module sites (JTAG signals are chained between DSPs on-module)

  • additional DSP Module Expansion Board options available, with up to eight SIMM, CONAN, or SODIMM module sites

  • standard ATX power supply with +5v and +3.3v output; adjustable voltage regulator provides +2.5v and +1.8v core voltages for advanced DSP devices

  • alternative ac-dc adapter power supply option

  • two Xilinx XCS40 FPGAs which provide interface between host and module edge connectors. These devices may be reprogrammed to add application-specific inter-DSP and inter-module serial port, interrupt, and other communication configurations

Together, the host interface card and development board define signal sets for:

  • DSP selection, including one or more DSPs in any combination for program load, run, reset, and memory writes, a "broadcast", or write-many, mode is available (memory reads are limited to a read-one mode)

  • DSP host-ports

  • DSP control lines (RESET signal, boot mode control, external interrupt, etc.)

  • FPGA command and data (serial port test, version/ID information readout, etc.)

  • JTAG interface

  • tracking information interface (to optional EEPROM device on module)

The SigC54/55/67xx Development System enables C54/55/67xx DSP developers to perform any number of functions required during general C54/55/67xx project development, including downloading DSP program files, sending commands and updating parameters in the DSP code, accessing DSP code variables, flags and buffers, and displaying intermediate results while real-time DSP code is running. The SigC54/55/67xx Development System provides an efficient, high-speed and flexible environment for controlling and monitoring DSP resources, including interrupts, serial ports, onchip and offchip (external) SRAM, DMA channels, onchip PLL, timers, and more.

Block Diagram

Below is a block diagram illustrating basic SigC54/55/67x Development System components:

Figure 2 SigC54/55/67xx Development System Diagram

In the above configuration, SigC54xx, SigC55xx, or SigC67xx modules are inserted into SODIMM sockets on the test platform by the operator for development, either singly or in groups as needed (see Figure 1 above, SODIMM Module and Socket Example), depending on the application. For example, in the case of the MELP Development System, which is a typical example of a speech compression development system, a SigSD4 Audio Module is also installed.

During development, the DirectDSP® software and Hypersignal®-Macro software components, both of which are off-the-shelf software packages developed by Signalogic, are used to provide an interface between user-defined, application specific software and the SigC54/55/67xx Development System. The DirectDSP® software provides an interface layer between application programs written in C/C++, Visual Basic, MATLAB®, or LabVIEW® on the host side, and real-time or embedded code running on various DSP hardware platforms on the DSP side. The Hypersignal®-Macro software provides embedded DSP functions and diagnostics which can be invoked through the DirectDSP® interface layer.

Software Development Block Diagram

Below is a block diagram of the relationship between application-specific software and development components:

Figure 3 Diagram of Application-Specific and Development Software Relationship

The DirectDSP software allows the use of standard, off-the-shelf development environments, including both popular simulation environments such as MATLAB and Visual C/C++, and product development or operator interface environments such as Visual Basic, as well as Signalogic development tools such as  VDS™.

Software Support and Debug

The SigC54/55/67xx Development System is fully supported by the DirectDSP®, DirectDSp, and Hypersignal®-Macro software development tools.

The multiprocessor host-port circuitry on the high-speed interface card and on the development platform provide compatibility with drivers used by Hypersignal®-Macro, DirectDSP, and Real-Time Composer™ software. This gives the SigC54/55/67xx Development System the capability to access and monitor data, variables, buffers, etc. in C54/55/67xx real-time code while it is either stopped or running, directly from C/C++, Visual Basic, MATLAB®, and LabVIEW® environments. Also provided are full board control, analog I/O initialization and control, program code download, and other hardware-related capabilities. The DirectDSP software includes complete source code and project file examples.


The SigC54/55/67xx Development System and contains a standard JTAG debug header compatible with Texas Instruments' Code Composer Studio debugger and software tools.

More Information

MELP Speech Compression Algorithm
Real-Time Algorithms
SigC55xx Modules
SigC67xx Modules
SigC54xx Modules
Analog I/O Modules
University Packages