Quatro67 MultiDSP Platform
Overview
The Quatro67 is an ultra-high performance coprocessor network-on-a-card featuring four (4) tightly coupled TMS320C67x processors. This performance powerhouse is suitable for a wide range of computationally
demanding applications including adaptive control, high bandwidth noise cancellation, complex simulations and advanced signal processing.
Applications include video and image HPC, numeric coprocessing, and large-scale data reduction.
The Quatro67 employs four (4) TMS320C67x processors. Each 'C67x processor features several onchip peripherals including two (2) 32-bit counter/timers, four (4) flexible DMA channels, 1 Mbit of on-chip RAM, a
dedicated parallel host port interface (HPI) and a prioritized interrupt controller. Memory on the Quatro67 includes a 128k x 32 asynchronous SRAM region (ASRAM) for bus mastering transfers and up to 16M x 32 of
1 wait-state synchronous DRAM (SDRAM)
per processor. Per processor memory may also be expanded to include 1M x 32 of 0 wait-state synchronous burst RAM (SBRAM).
Specifications
- four (4) C6701 32-bit floating-point processors, 150 MHz, 1 GFLOP each
- each C6701 processor has 16k x 32 onchip program memory and 16k x 32 onchip data memory, two (2) multichannel buffered serial ports, two (2) 32-bit timers, four (4) DMA channels, and 32-bit external memory bus
- up to 16M x 32 1 wait-state SDRAM and up to 1M x 32 0 wait-state SBRAM, per processor
- six (6) interprocessor communication 512 x 32 FIFOs, allowing any processor to talk to any other at rates up to 160 Mbytes/sec
- three (3) FIFOPort connections to external peripheral; FIFOs are 512 x 16 with variable partial buffer-ready flag option for precise latency control
- PCI interface implemented using V3 Semi. Conductor controller; this device has dual-port access to SARAM (shared with C6701 processor 0)
- full-size PCI (standard PC) form-factor, max component height of 0.70"
- power requirement is 10A typical @ 3.3V, depending on software executed and processor revision level
- JTAG 1149.1 debug connector, one for control processor and other chained between DSP devices 1-3
Quatro67 Add-On Boards
- M67 Flexible DSP/Data Acquisition Board
- VMFC-2100 single- or dual-port Fibre Channel Mezzanine Board
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Quatro67 Block Diagram
Below is a block diagram depiction of the Quatro67. Note that in any cases where the block diagram and specifications above disagree, the specifications above are correct:
Quatro67 Software Support
The Quatro67 board is supported by Signalogic off-the-shelf DSP software products designed for DSP-based data acquisition and C67x DSP code development. The software items listed below use VxD and kernel-mode
device drivers developed by Signalogic, and provide support for the Quatro67 under Win9x, and WinXP:
Hypersignal®-Macro and
Hypersignal-Acoustic
software series, which offer a number of simulation and real-time instrument functions.
Simulation functions include DSP and math functions, time domain display (including
waterfall, contour, magnitude, unwrapped phase), difference equation, digital FIR and IIR
filter design, sampling rate conversion, frequency zoom, wavelet transform, minimum phase
calculation, and many more. Instrument functions include spectrum analyzer, digital
oscilloscope, stimulus & response measurement, continuous signal generation, real-time
"snap-in" filtering, continuous disk record and generate, and more.
DirectCore® is a Windows library which provides low-level
and high-level calls for user-defined C/C++,
Visual Basic,
MATLAB®, or
LabVIEW® programs.
DirectCore includes low-level Quatro67 board control functions such as reset/run/hold,
register access, block memory transfer, DSP executable file download, etc. High-level
functions include waveform file acquire/generate, continuous signal generation, and
execution of any arbitrary Hypersignal DSP or math function. DirectCore includes
strip-chart recorder, digital oscilloscope and digital tape recorder demo program and
source code examples.
The TMS320C67x
Source Code Interface contains numerous C67x
algorithms and functions in source and binary form, such as optimized FFTs, filters,
matrix, transcendental, trig, signal manipulation function, Quatro67 board initialization
and analog I/O examples, etc. These functions form the basis of higher-level software
functions and instruments; modification can be used to customize Hypersignal or
DirectDSP operation. User-defined C routine hooks are provided for real-time algorithm
development. The C67x Source Code Interface can be used as a basic foundation for
user-defined real-time DSP systems and products.
Real-Time Composer™ is a Windows program which offers a
block-diagram based design environment that allows both block-diagram simulation and
interactive display and instrument functions, including control over individual
Hypersignal and MATLAB blocks. The DSPower-Real-Time Code Generator includes complete
visual IDE for Texas Instruments development tools, and allows C source code generation
from block diagram, with generated programs compiled and downloaded to the Quatro67 board
for real-time execution.
